A flexible FPGA based QDC and TDC for the HADES and the CBM calorimeters
Feb 14, 2017Part of Proceedings, Topical Workshop on Electronics for Particle Physics (TWEPP 2016) : Karlsruhe, Germany
Published in:
- JINST 12 (2017) 02, C02047
Contribution to:
- Published: Feb 14, 2017
Experiments:
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Abstract: (IOP)
A Charge-to-Digital-Converter (QDC) and Time-to-Digital-Converter (TDC) based on a commercial FPGA (Field Programmable Gate Array) was developed to read out PMT signals of the planned HADES electromagnetic calorimeter (ECAL) at GSI Helmholtzzentrum für Schwerionenforschung GmbH (Darmstadt, Germany). The main idea is to convert the charge measurement of a detector signal into a time measurement, where the charge is encoded in the width of a digital pulse, while the arrival time information is encoded in the leading edge time of the pulse. The PaDiWa-AMPS prototype front-end board for the TRB3 (General Purpose Trigger and Readout Board—version 3) which implements this conversion method was developed and qualified. The already well established TRB3 platform provides the needed precise time measurements and serves as a data acquisition system. We present the read-out concept and the performance of the prototype boards in laboratory and also under beam conditions. First steps have been completed in order to adapt this concept to SiPM signals of the hadron calorimeter in the CBM experiment at the planned FAIR facility (Darmstadt).- Analogue electronic circuits
- Front-end electronics for detector readout
- Digital electronic circuits
- Calorimeters
- calorimeter: electromagnetic
- photomultiplier: silicon
- time-to-digital converter
- FPGA
- HADES
- CBM
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