Firmware development and testing of the ATLAS IBL Back Of Crate card - INSPIRE

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Firmware development and testing of the ATLAS IBL Back Of Crate card

ATLAS

Collaboration

•

M.E. Stramaglia
(
- Bern U., LHEP
)

for the collaboration.

Feb 19, 2015

8 pages

Part of Proceedings, 7th International Workshop on Semiconductor Pixel Detectors for Particles and Imaging (PIXEL 2014) : Niagara Falls, Ontario, Canada, September 1-5, 2014

Published in:

JINST 10 (2015) 02, C02035

Contribution to:

- PIXEL 2014

Published: Feb 19, 2015

DOI:

10.1088/1748-0221/10/02/C02035

Experiments:

CERN-LHC-ATLAS

View in:

CERN Document Server

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Abstract: (IOP)

ATLAS is one of the four big LHC experiments and recently its Pixel Detector was upgraded with a new innermost 4th layer: the Insertable B-Layer (IBL) . The upgrade will result in better tracking efficiency, improved precision of measurements and, in the future, compensation for radiation damage of the Pixel-Detector. Newly developed front-end electronics and the higher than originally planned LHC luminosity required a complete re-design of the Off Detector Electronics consisting of the Back Of Crate card (BOC) and the Read Out Driver (ROD) . The main purposes of the BOC card are the distribution of the LHC clock to all Pixel Detector components as well as interfacing the detector and the higher level readout optically. The data-path to the detector runs a 40 MHz bi phase mark (BPM) encoded stream. The 160 MHz 8b10b encoded data path from the detector is phase and word aligned in the firmware and then forwarded to the ROD after decoding. The ROD will send out the processed data that is then forwarded to the higher level readout by the BOC card. An overview of the newly developed firmware will be presented together with the results from production tests and the system test at CERN . Focus is put on the partial reconfiguration and results of the fine delay measurements.

Electronic detector readout concepts (solid-state)
Solid state detectors
Particle tracking detectors (Solid-state detectors)
semiconductor detector: pixel
ATLAS
upgrade
electronics: readout
signal processing
performance

References(18)

Figures(0)

[1]

The ATLAS Experiment at the CERN Large Hadron Collider

ATLAS

Collaboration

•

G. Aad
(
- Marseille, CPPM
)

et al.

- JINST 3 (2008) S08003
•
DOI:
- 10.1088/1748-0221/3/08/S08003

[2]

LHC Machine

Lyndon Evans
(
- CERN
)
(ed.)
,
Philip Bryant
(
- CERN
)
(ed.)

- JINST 3 (2008) S08001
•
DOI:
- 10.1088/1748-0221/3/08/S08001

[3]

ATLAS pixel detector electronics and sensors

et al.

- JINST 3 (2008) P07007
•
DOI:
- 10.1088/1748-0221/3/07/P07007

[4]

The FE-I4 pixel readout integrated circuit

M. Garcia-Sciveres
(
- LBL, Berkeley
)
,
D. Arutinov
(
- Bonn U.
)
,
M. Barbero
(
- Bonn U.
)
,
R. Beccherle
(
- INFN, Genoa
)
,
S. Dube
(
- LBL, Berkeley
)

et al.

- Nucl.Instrum.Meth.A 636 (2011) S155-S159
•
DOI:
- 10.1016/j.nima.2010.04.101

[5]

Prototype ATLAS IBL Modules using the FE-I4A Front-End Readout Chip

ATLAS IBL

Collaboration

•

J Albert
(
- Victoria U.
)

et al.

- JINST 7 (2012) P11010
•
e-Print:
- 1209.1906
•
DOI:
- 10.1088/1748-0221/7/11/P11010

[6]

ATLAS technical design report ATLAS-TDR-19

ATLAS collaboration

Collaboration

•

Insertable B-Layer

for the collaboration.

[7]

M. &#268

[7]

The ATLAS Diamond Beam Monitor

ATLAS DBM

Collaboration

•

M. Červ
(
- CERN
)

for the collaboration.

- JINST 9 (2014) C02026
•
DOI:
- 10.1088/1748-0221/9/02/C02026

[8]

Testing and firmware development for the ATLAS IBL BOC prototype

ATLAS

Collaboration

•

M. Wensing
(
- Wuppertal U.
)

for the collaboration.

- JINST 7 (2012) C12027
•
DOI:
- 10.1088/1748-0221/7/12/C12027

[9]

The Read-Out Driver'' ROD card for the Insertable B-layer (IBL) detector of the ATLAS experiment: commissioning and upgrade studies for the Pixel Layers 1 and 2

G. Balbi
(
- INFN, Bologna
)
,
M. Bindi
(
- INFN, Bologna
)
,
S.P. Chen
(
- Washington U., Seattle
)
,
D. Falchieri
(
- Bologna U. and
- INFN, Bologna
)
,
T. Flick
(
- Wuppertal U.
)

et al.

- JINST 9 (2014) 01, C01044
•
DOI:
- 10.1088/1748-0221/9/01/C01044

[10]

Xilinx Inc., Spartan-6 FPGA Family

- http://www.xilinx.com/products/silicon-devices/fpga/spartan-6/index.htm

[11]

SNAP12 Multi-Source Agreement

[12]

FTK: A Fast Track Trigger for ATLAS

J. Anderson
(
- Argonne
)
,
A. Andreani
(
- INFN, Milan and
- Milan U.
)
,
A. Andreazza
(
- INFN, Milan and
- Milan U.
)
,
A. Annovi
(
- Frascati
)
,
M. Atkinson
(
- Illinois U., Urbana
)

et al.

- JINST 7 (2012) C10002
•
DOI:
- 10.1088/1748-0221/7/10/C10002

[13]

A DC-balanced partitioned-block, 8B/10B transmission code

A.X. Widmer
,
P.A. Franaszek

- IBM J.Res.Dev. 27 (1983) 440
•
DOI:
- 10.1147/rd.275.0440

[14]

Xilinx Inc., AR #34276

- http://www.xilinx.com/support/answers/34276.html

[15]

ATLAS experiment &#8212

[15]

public results #IBL_Tests_in_the_Pit

- https://twiki.cern.ch/twiki/bin/view/AtlasPublic/ApprovedPlotsPixel

[16]

Xilinx Inc., FPGA Editor guide

- http://www.xilinx.com/support/sw_manuals/2_1i/download/fpedit.pdf