literature
Literature
Authors
Jobs
Seminars
Conferences
DataBETA

Proposal for the development of 3D Vertically Integrated Pattern Recognition Associative Memory (VIPRAM)

Oct, 2010
57 pages
DOI:
Report number:
  • FERMILAB-TM-2482-E-PPD
View in:
pdflinks
reference search1 citation

Citations per year

20092010201101
  • [1]

    FTK: A Hardware Track Finder for the ATLAS Trigger

    • [2]

      Current Amchip R&D: mini@sic

      • L. Sartori
      • [3]

        The GigaFitter: A next generation track fitter to enhance online tracking performances at CDF

        • A. Annovi
          ,
        • M. Bettini
          ,
        • M. Bucciantonio
          ,
        • P. Catastini
          ,
        • F. Crescioli
        et al.
        • [4]

          The tree search processor for real-time track finding

          • A. Bardi
            ,
          • M. Dell'Orso
            ,
          • S. Galeotti
            ,
          • P. Giannetti
            ,
          • G. Iannaccone
          et al.
          • [5]

            3-D ICs: A Novel Chip Design for Improving Deep-Sub micrometer Interconnect Performance and Systems-on-Chip Integration

            • K. Banerjee
              ,
            • S. Souri
              ,
            • P. Kapur
              ,
            • K. Saraswat
            • [6]
              Tezzaron Semiconductor
            • [7]

              A VLSI Processor for Fast Track Finding Based on Content Addressable Memories

              • A. Annovi
                ,
              • A. Bardi
                ,
              • M. Bitossi
                ,
              • S. Chiozzi
                ,
              • C. Damiani
              et al.
                • IEEE Trans.Nucl.Sci. 53 (2006) 1
            • [8]

              Demystifying 3D ICs: The Pros and Cons of Going Vertical

              • W.R. Davis
                ,
              • J.Wilson
                ,
              • S. Mick
                ,
              • J. Xu
                ,
              • H. Hua
              et al.
              • [9]

                Content-Addressable Memories

                • T. Kohonen
                • [10]

                  Associative Processors and Memories: A Survey

                  • K.E. Grosspietsch
                    • IEEE Micro 12 (1992) 12
                • [12]

                  200 MHz/200MSPS 3.2W at 1.5V Vdd, 9.4 Mbits Ternary CAM with New Charge Injection Match Detect Circuits and Bank Selection Scheme

                  • G. Kasai
                    ,
                  • Y. Takarabe
                    ,
                  • K. Furumi
                    ,
                  • M. Yoneda
                  • [13]

                    Use of Charge Sharing to Reduce Energy Consumption in Wide Fan-in Gates

                    • M.M. Khellah
                      ,
                    • M. Elmasry
                    • [14]

                      Use of Selective Precharge for Low-Power Content-Addressable Memories

                      • C.A. Zukowski
                        ,
                      • S.Y. Wang
                      • [15]

                        A Current-Saving Match-Line Sensing Scheme for Content-Addressable Memories

                        • I. Arsovski
                          ,
                        • A. Sheikholeslami
                        • [16]

                          Architectures for Large-Capacity CAMs

                          • K.J. Schultz
                            ,
                          • P.G. Gulak